Patent · US Active

Buffer management architecture

US7689793B1 · kind B1 · utility

4Cited by
11References
44Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 24, 2004
Grant dateMar 30, 2010
Priority date
Expiry dateJul 17, 2027

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F12/023
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A network switch may include a buffer management module to manage buffers in a buffer memory. The buffer management module may include an Allocation SRAM and a Reclaim SRAM. Each buffer in the buffer memory may be associated with a corresponding bit in the Allocation SRAM and Reclaim SRAM. A line including bits indicating available buffers in the Allocation SRAM may be written to the allocation register, and the buffer management module may allocate buffers from the allocation register. A reclaim module may age bits in the Reclaim SRAM. The reclaim module may reclaim buffers by searching corresponding lines in the Allocation SRAM and Reclaim SRAM and comparing the values of bits in the two lines.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.