Semiconductor memory device
US7692948B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 4, 2008 |
| Grant date | Apr 6, 2010 |
| Priority date | — |
| Expiry date | Aug 15, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The sense amp circuit includes a first node given a first, positive constant voltage larger than a fixed potential before reading, a second node given a second, negative constant voltage smaller than the fixed potential before reading, and a third node to be connected to the first and second nodes on reading. A first transistor is connected between the first node and the bit line and operative to turn on when the potential on the bit line becomes smaller than the fixed potential. A second transistor is connected between the second node and the bit line and operative to turn on when the potential on the bit line becomes larger than the fixed potential. A first capacitor is connected between the first node and the fixed potential. A second capacitor is connected between the second node and the fixed potential.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.