Semiconductor devices including high-k dielectric materials
US7696552B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 15, 2005 |
| Grant date | Apr 13, 2010 |
| Priority date | — |
| Expiry date | Feb 7, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
A semiconductor device includes a first conductive layer on a semiconductor substrate, a dielectric layer including a high-k dielectric material on the first conductive layer, a second conductive layer including polysilicon doped with P-type impurities on the dielectric layer, and a third conductive layer including a metal on the second conductive layer. In some devices, a first gate structure is formed in a main cell region and includes a tunnel oxide layer, a floating gate, a first high-k dielectric layer, and a control gate. The control gate includes a layer of polysilicon doped with P-type impurities and a metal layer. A second gate structure is formed outside the main cell region and includes a tunnel oxide layer, a conductive layer, and a metal layer. A third gate structure is formed in a peripheral cell region and includes a tunnel oxide, a conductive layer, and a high-k dielectric layer having a width narrower than the conductive layer. Method embodiments are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.