Method and system for switching between two (or more) reference signals for clock synchronization
US7697647B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 3, 2005 |
| Grant date | Apr 13, 2010 |
| Priority date | — |
| Expiry date | Feb 11, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L2207/50
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus and method is disclosed for synchronizing a timing signal for a computational system to different reference clock signals without impairing the operation of the computational system. A corresponding “offset” register is provided for each of the reference clock signals (RCS) for storing signal timing differences between the timing signal and RCS. When one of the reference clock signals not used for synchronizing the timing signal, is selected as the signal for synchronizing the timing signal, the corresponding offset register R0 (for the newly selected reference clock signals) retains its last value prior to the switch, and another register R1 stores subsequent signal timing differences between the timing signal and the newly selected reference clock signals. To synchronize the timing signal with the new reference clock signal without distorting the timing signal and impairing the operation of the computation system, differences between R1 and R0 are output (for successive time intervals) for iteratively adjusting the timing signals. The contents of the offset register R0 is incrementally changed toward a predetermined value (i.e., zero) thereby gradually adjusting the …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.