Minimal area integrated circuit implementation of a polyphase interpolation filter using coefficients symmetry
US7698355B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 29, 2005 |
| Grant date | Apr 13, 2010 |
| Priority date | — |
| Expiry date | Aug 14, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H17/0657
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A minimal area integrated polyphase interpolation filter uses a symmetry of coefficients for a channel of input data. The filter includes an input interface block for synchronizing the input signal to a first internal clock signal; a memory block for providing multiple delayed output signals; a multiplexer input interface block for outputting a selected plurality of signals for generating mirror image coefficient sets in response to a second set of internal control signals, a coefficient block for generating mirror image and/or symmetric coefficient sets, and to output a plurality of filtered signals, an output multiplexer block for performing selection, gain control and data width control on said plurality of filtered signals, an output register block synchronizing the filtered signals, and a control block generating clock signals for realization of the filter and to delay between two channels to access a coefficient set, thereby minimizing hardware in the filter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.