Method of manufacturing a wiring substrate and semiconductor device
US7701726B2 · kind B2 · utility
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10Claims
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Key dates
| Filing date | Dec 19, 2008 |
| Grant date | Apr 20, 2010 |
| Priority date | — |
| Expiry date | Dec 19, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/09781
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A wiring substrate includes a base insulating film, a first interconnection formed on a top surface side of the base insulating film, a via conductor provided in a via hole formed in the base insulating film, and a second interconnection provided on a bottom surface side of the base insulating film, the second interconnection being connected to the first interconnection via the via conductor. The wiring substrate includes divided-substrate-unit regions, in each of which the first interconnection, the via conductor, and the second interconnection are formed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.