Patent · US Active

Process for converting programs in high-level programming languages to a unified executable for hybrid computing platforms

US7703085B2 · kind B2 · utility

35Cited by
39References
5Claims
0Family size

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Key dates

Filing dateOct 4, 2005
Grant dateApr 20, 2010
Priority date
Expiry dateJan 22, 2029

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F8/447
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A system and method for compiling computer code written to conform to a high-level language standard to generate a unified executable containing the hardware logic for a reconfigurable processor, the instructions for a traditional processor (instruction processor), and the associated support code for managing execution on a hybrid hardware platform. Explicit knowledge of writing hardware-level design code is not required since the problem can be represented in a high-level language syntax. A top-level driver invokes a standard-conforming compiler that provides syntactic and semantic analysis. The driver invokes a compilation phase that translates the CFG representation being generated into a hybrid controlflow-dataflow graph representation representing optimized pipelined logic which may be processed into a hardware description representation. The driver invokes a hardware description language (HDL) compiler to produce a netlist file that can be used to start the place-and-route compilation needed to produce a bitstream for the reconfigurable computer. The programming environment then provides support for taking the output from the compilation driver and combining all the necessary…

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.