Destructor integrated circuit chip, interposer electronic device and methods
US7705439B2 · kind B2 · utility
5Cited by
12References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 25, 2005 |
| Grant date | Apr 27, 2010 |
| Priority date | — |
| Expiry date | Nov 10, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/922
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor chip includes a first integrated circuit chip and a depression substrate attached to the integrated circuit chip, wherein the integrated circuit chip and the depression substrate define a cavity therebetween. The semiconductor chip also includes a stress sensitive material located in the cavity and a chemical located in the cavity, wherein detection of tampering causes a reaction by the chemical such that the semiconductor chip is at least partially destroyed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.