Semiconductor memory device capable of driving non-selected word lines to a variable negative potential based on a bank access operation
US7706209B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2005 |
| Grant date | Apr 27, 2010 |
| Priority date | — |
| Expiry date | Nov 8, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2227
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device, including a word line driver for driving a word line connected to a memory cell in a memory cell array and for resetting the word line when the memory cell changes from an activated to a standby state. The reset level of the word line driver is set when resetting of the word line is performed, and may be switched between first and second potentials. A word line reset level generating circuit varies the amount of negative potential current supply in accordance with memory cell array operating conditions. The semiconductor device includes a plurality of power source circuits, each having an oscillation circuit and a capacitor, for driving the capacitor via an oscillation signal outputted by the oscillation circuit. At least some power source circuits share a common oscillation circuit, and different capacitors are driven via the common oscillation signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.