Techniques for grouping circuit elements into logic blocks
US7707532B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 23, 2007 |
| Grant date | Apr 27, 2010 |
| Priority date | — |
| Expiry date | Aug 23, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/394
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques are provided for grouping circuits in a user design for a programmable integrated circuit into logic blocks. A packing tool separates each circuit element into individual abstract blocks and groups the abstract block into logic blocks. A determination is made whether placement information indicates that a design goal would be improved by rearranging at least a portion of the user design. The user design can be rearranged by moving one or more of the abstract blocks into different logic blocks than the ones they were previously grouped with. Circuit elements in the same logic block can be separated and placed into different logic blocks to improve routability of the user design and signal timing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.