System, method and software to preload instructions from an instruction set other than one currently executing
US7711927B2 · kind B2 · utility
5Cited by
12References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 14, 2007 |
| Grant date | May 4, 2010 |
| Priority date | — |
| Expiry date | Nov 7, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/382
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An instruction preload instruction executed in a first processor instruction set operating mode is operative to correctly preload instructions in a different, second instruction set. The instructions are pre-decoded according to the second instruction set encoding in response to an instruction set preload indicator (ISPI). In various embodiments, the ISPI may be set prior to executing the preload instruction, or may comprise part of the preload instruction or the preload target address.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.