Patent · US Active

Method of making a semiconductor structure utilizing spacer removal and semiconductor structure

US7713801B2 · kind B2 · utility

3Cited by

4References

9Claims

0Family size

Inventors

Vishal P. Trivedi · Chandler, US
Dharmesh Jawarani · Round Rock, US
Michael D. Turner · Plymouth, US

Key dates

Filing date	Mar 30, 2007
Grant date	May 11, 2010
Priority date	—
Expiry date	Jan 11, 2028

Classification

Technology area (CPC H)Electricity
CPC primaryH10D30/0212
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A method for making a semiconductor structure (10) includes providing a wafer with a structure (16) having a sidewall, forming a sidewall spacer (22) adjacent to the sidewall, and forming a layer of material (28) over the wafer including over the sidewall spacer and over the structure having the sidewall. The method further includes etching the layer, wherein the etching (i) leaves at least portions of the sidewall spacer exposed and (ii) leaves a portion of the layer located over the structure having a sidewall. The portion of the layer located over the structure having a sidewall is reduced in thickness by the etching. Subsequent to etching the layer, the method includes removing the sidewall spacer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.