Method of manufacturing semiconductor device
US7713826B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 11, 2008 |
| Grant date | May 11, 2010 |
| Priority date | — |
| Expiry date | Mar 30, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/601
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided is a method of manufacturing a semiconductor device including a high-k dielectric thin layer formed using an interfacial reaction. The method includes the steps of: forming an oxide layer on a silicon substrate; depositing a metal layer on the oxide layer to form a metal silicate layer using an interfacial reaction between the oxide layer and the metal layer; forming a metal gate by etching the metal silicate layer and the metal layer; and forming a lightly doped drain (LDD) region and source and drain regions in the silicon substrate after forming the metal gate. In this method, a semiconductor device having high quality and performance can be manufactured by a simpler process at lower cost.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.