Printed wiring board
US7714233B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2006 |
| Grant date | May 11, 2010 |
| Priority date | — |
| Expiry date | Jun 29, 2026 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49165
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A printed wiring board including a wiring substrate provided with at least one conductor circuit, a solder resist layer formed on the surface of the wiring substrate, covering the at least one conductor circuit, conductor pads formed on a part of the at least one conductor circuit exposed from respective openings provided in the solder resist layer for mounting electronic parts, and solder bumps formed on the respective conductor pads. The ratio (H/D) of a height H of the solder bumps from solder resist layer surface to an opening diameter of the openings are made to be about 0.55 to about 1.0 with the pitch of the openings provided in the solder resist layer of about 200 μm or less.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.