Surface-stabilized semiconductor device
US7714360B2 · kind B2 · utility
57Cited by
8References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2007 |
| Grant date | May 11, 2010 |
| Priority date | — |
| Expiry date | Dec 20, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/64
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A high electron mobility transistor is disclosed which has a main semiconductor region formed on a silicon substrate. The main semiconductor region is a lamination of a buffer layer on the substrate, an electron transit layer on the buffer layer, and an electron supply layer on the electron transit layer. A source, drain, and gate overlie the electron supply layer. Also formed on the electron supply layer is a surface-stabilizing organic semiconductor overlay which is of p conductivity type in contrast to the n type of the electron supply layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.