Patent · US Active

Integrated circuits and methods of manufacturing thereof

US7714377B2 · kind B2 · utility

13Cited by

0References

35Claims

0Family size

Assignees

Qimonda AG · DE
Qimonda Flash GmbH · DE

Inventors

Michael Specht · Munich, DE
Nicolas Nagel · Yokohama, JP
Franz Hofmann · Munich, DE
Thomas Mikolajick · Birkenfeld, DE

Key dates

Filing date	Apr 19, 2007
Grant date	May 11, 2010
Priority date	—
Expiry date	Aug 20, 2028

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY10T29/49117
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Embodiments of the invention relate to integrated circuits having a memory cell arrangement and methods of manufacturing thereof. In one embodiment of the invention, an integrated circuit has a memory cell arrangement which includes a fin structure extending in its longitudinal direction as a first direction, including a first insulating layer, a first active region disposed above the first insulating layer, a second insulating layer disposed above the first active region, a second active region disposed above the second insulating layer, a charge storage layer structure disposed at least next to at least one sidewall of the fin structure covering at least a portion of the first active region and at least a portion of the second active region, and a control gate disposed next to the charge storage layer structure.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.