Michael Specht
66Patents
12h-index
118Co-inventors
87Inventor score
Filing activity: Sep 2, 2002 → Jul 29, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7915667B2 | Integrated circuits having a contact region and methods for manufacturing the same | Electricity | 467 | Active |
| US7208794B2 | High-density NROM-FINFET | Emerging Cross-Sectional Technologies | 90 | Expired |
| US10102356B1 | Securing storage control path against unauthorized access | Physics | 78 | Active |
| US7692246B2 | Production method for a FinFET transistor arrangement, and corresponding FinFET transistor arrangement | Electricity | 29 | Active |
| US8185505B1 | Techniques for processing recovery points | Physics | 27 | Active |
| US7368752B2 | DRAM memory cell | Electricity | 23 | Expired |
| US8751878B1 | Automatic failover during online data migration | Physics | 20 | Active |
| US7352018B2 | Non-volatile memory cells and methods for fabricating non-volatile memory cells | Electricity | 19 | Expired |
| US8600952B2 | Techniques for processing recovery points | Physics | 17 | Active |
| US7714377B2 | Integrated circuits and methods of manufacturing thereof | Emerging Cross-Sectional Technologies | 13 | Active |
| US8370592B1 | Multi-machine atomic seamless migration | Physics | 13 | Active |
| US7411822B2 | Nonvolatile memory cell arrangement | Electricity | 13 | Expired |
| US8392753B1 | Automatic failover during online data migration | Physics | 12 | Active |
| US7649779B2 | Integrated circuits; methods for manufacturing an integrated circuit; memory modules; computing systems | Electricity | 12 | Active |
| US8261029B1 | Dynamic balancing of writes between multiple storage devices | Physics | 12 | Active |
| US7075148B2 | Semiconductor memory with vertical memory transistors in a cell array arrangement with 1-2F2 cells | Electricity | 12 | Expired |
| US7298004B2 | Charge-trapping memory cell and method for production | Electricity | 12 | Expired |
| US7875516B2 | Integrated circuit including a first gate stack and a second gate stack and a method of manufacturing | Electricity | 11 | Active |
| US6954835B1 | Intercepting control of a host I/O process | Emerging Cross-Sectional Technologies | 11 | Expired |
| US7265376B2 | Non-volatile memory cell, memory cell arrangement and method for production of a non-volatile memory cell | Electricity | 10 | Expired |
| US10521124B1 | Application-specific workload-based I/O performance management | Physics | 9 | Active |
| US7709827B2 | Vertically integrated field-effect transistor having a nanostructure therein | Electricity | 9 | Expired |
| US8589513B1 | Remote mirroring of group name services | Physics | 8 | Active |
| US7797500B1 | Geometry adaptation using data redistribution | Physics | 7 | Active |
| US7344923B2 | NROM semiconductor memory device and fabrication method | Electricity | 6 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.