Patent · US Expired

Semiconductor chip arrangement

US7714447B2 · kind B2 · utility

3Cited by

13References

2Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Markus Eigner · Munich, DE
Wolfgang Gruber · Bischofswerda, DE
Manfred Roth · Munich, DE
Stefan Ruping · Lengdorf, DE

Key dates

Filing date	Aug 25, 2005
Grant date	May 11, 2010
Priority date	—
Expiry date	Apr 15, 2026

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/0002
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A patterned connection plane between two semiconductor chips which are connected using face-to-face technology is patterned into first pads, second pads, and conductor strips which are alternatively connected to one of these pads. The conductor strips are connected to a read-out circuit in one of the semiconductor chips via connections.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.