High-frequency clock detection circuit
US7714619B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 16, 2008 |
| Grant date | May 11, 2010 |
| Priority date | — |
| Expiry date | Sep 16, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In order to provide a high frequency clock detection circuit capable to detect a high frequency clock using any period as a threshold, the high frequency clock detection circuit of the present invention includes a delay circuit having a delay time set to be longer than a clock period corresponding to the irregular high frequency state, a first flip-flop circuit for delay flip-flopping according to the clock signal and for being provided with the inverted and feedback inputted output from the first flip-flop circuit, a second flip-flop circuit for delay flip-flopping according to the clock signal and for being provided with the inverted and feedback inputted output from the second flip-flop circuit through the delay circuit, and a detection-result output circuit for detecting a difference between the output signal from the first flip-flop circuit and the output signal from the second flip-flop circuit and for providing the function circuit with the high frequency clock detection signal indicating the irregular high frequency state corresponding to an occurrence of the difference.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.