Programmable local clock buffer

US7719315B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Hung C. Ngo · Austin, US
• Jente B. Kuang · Austin, US
• James D. Warnock · Somers, US
• Dieter Wendel · Schenefeld, DE

Key dates

• Filing date: Oct 31, 2006
• Grant date: May 18, 2010
• Expiry date: Nov 8, 2028

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/318552
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

A programmable clock generator circuit receives control signals and a global clock and generates a pulsed data clock and a scan clock in response to gating signals. The clock generator has data clock and scan clock feed-forward paths and a single feedback path. Delay control signals program delay elements in the feedback path and logic gates reshape and generate a feedback clock signal. The global clock and the feedback clock signal are combined to generates a pulsed local clock signal. A scan clock feed-forward circuit receives the local clock and generates the scan clock. A data clock feed-forward circuit receives the local clock and generates the data clock with a logic controlled delay relative to the local clock signal. The feedback clock is generated with controlled delay thereby modifying the pulse width of the data and scan clocks independent of the controlled delay of the data clock feed-forward path.