Integrated semiconductor memory
US7719868B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 8, 2007 |
| Grant date | May 18, 2010 |
| Priority date | — |
| Expiry date | Jul 4, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated semiconductor memory has memory cells, with at least one pair of bit lines which comprises a first bit line and a second bit line, and with at least one sense amplifier which has the first bit line and the second bit line connected to it. The bit lines respectively have a first conductor track structure and a second conductor track structure, where the memory cells are respectively connected to the second conductor track structure, and where the first conductor track structure is respectively interposed between the sense amplifier and the second conductor track structure of the respective bit line and is arranged at a greater distance from the substrate area than the respective second conductor track structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.