Joerg Vollrath
32Patents
6h-index
25Co-inventors
65Inventor score
Filing activity: Jun 30, 1997 → Nov 14, 2012
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6564346B1 | Advanced bit fail map compression with fail signature analysis | Physics | 22 | Expired |
| US6304479A | Shielded bit line architecture for memory arrays | Physics | 18 | Expired |
| US6453433B1 | Reduced signal test for dynamic random access memory | Physics | 18 | Expired |
| US6365947B1 | Semiconductor device and method of increasing channel length to eliminate short channel effects of corner devices | Electricity | 9 | Expired |
| US7719868B2 | Integrated semiconductor memory | Electricity | 7 | Active |
| US7068546B2 | Integrated memory having a voltage generator circuit for generating a voltage supply for a read/write amplifier | Physics | 7 | Expired |
| US6696349B2 | STI leakage reduction | Electricity | 6 | Expired |
| US6207513A | Spacer process to eliminate corner transistor device | Electricity | 6 | Expired |
| US7051253B2 | Pseudo fail bit map generation for RAMS during component test and burn-in in a manufacturing environment | Physics | 5 | Expired |
| US6927557B2 | Voltage generator arrangement | Physics | 4 | Expired |
| US7376026B2 | Integrated semiconductor memory having sense amplifiers selectively activated at different timing | Physics | 4 | Active |
| US5831917A | Techniques for reducing redundant element fuses in a dynamic random access memory array | Physics | 4 | Expired |
| US6967370B2 | Integrated semiconductor circuit having a multiplicity of memory cells | Electricity | 3 | Expired |
| US7023276B2 | Differential amplifier circuit | Electricity | 3 | Expired |
| US6998664B2 | Integrated semiconductor circuit having a cell array having a multiplicity of memory cells | Electricity | 3 | Expired |
| US6490209B1 | Memory employing multiple enable/disable modes for redundant elements and testing method using same | Physics | 2 | Expired |
| US7196537B2 | Integrated circuit | Physics | 2 | Expired |
| US7224627B2 | Integrated semiconductor circuit and method for testing the same | Physics | 2 | Expired |
| US7365554B2 | Integrated circuit for determining a voltage | Physics | 2 | Expired |
| US6981175B2 | Memory and method for employing a checksum for addresses of replaced storage elements | Physics | 2 | Expired |
| US7372095B2 | Integrated semiconductor circuit comprising a transistor and a strip conductor | Electricity | 1 | Expired |
| US7626870B2 | Semiconductor device with a plurality of one time programmable elements | Physics | 1 | Active |
| US6737671B2 | Current measurement circuit and method for voltage regulated semiconductor integrated circuit devices | Physics | 1 | Expired |
| US6538939B1 | Memory employing multiple enable/disable modes for redundant elements and testing method using same | Physics | 1 | Expired |
| US7313741B2 | Integrated semiconductor memory | Physics | 1 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.