Patent · US Active

Gate driver with programmable dead-time insertion

US7724054B2 · kind B2 · utility

5Cited by
3References
10Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 6, 2005
Grant dateMay 25, 2010
Priority date
Expiry dateJun 5, 2028

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K19/0013
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A dead-time generator for incorporation in an integrated circuit wherein the integrated circuit includes a high side and low side gate driver and wherein the high side and low side gate driver drive output switches such that a dead-time is provided between on times of the output switches, the dead-time generator comprising a circuit internal to the integrated circuit having an external terminal at which a dead-time setting component is connected, and wherein the dead-time generator comprises a circuit for providing a discrete dead-time for a range of dead-time setting values at the dead-time setting terminal and wherein, for a plurality of ranges of dead-time setting values at the dead-time setting terminal, the dead-time generator generates an associated plurality of discrete dead-times.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.