Capacitive divider sensing of memory cells
US7724564B2 · kind B2 · utility
16Cited by
19References
29Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 2, 2008 |
| Grant date | May 25, 2010 |
| Priority date | — |
| Expiry date | Nov 3, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5634
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure includes devices and methods for sensing resistance variable memory cells. One device embodiment includes at least one resistance variable memory cell, and a capacitive divider configured to generate multiple reference levels in association with the at least one resistance variable memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.