Method and apparatus for a programmably terminated receiver
US7724815B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 27, 2007 |
| Grant date | May 25, 2010 |
| Priority date | — |
| Expiry date | Feb 28, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0298
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for a receive equalizer of a gigabit transceiver that is reconfigurable to support multiple communication standards. Communication standards having variable common mode and coupling requirements are accommodated through the use of reconfigurable integrated circuits (ICs), such as field programmable gate arrays (FPGAs), that provide a plurality of reconfigurable transceivers that are programmable through configuration, or partial reconfiguration, events. The reconfigurable transceivers apply internally generated common mode voltage signals to the differential input in support of the various communication standards.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.