Method and apparatus for modeling multiple instances of an electronic circuit using an imperative programming language description
US7725869B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 7, 2005 |
| Grant date | May 25, 2010 |
| Priority date | — |
| Expiry date | Mar 25, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Method and apparatus for modeling multiple instances of an electronic circuit using an imperative programming language description is described. In one example, a program is defined using an imperative programming language. The program includes multiple calls to a function. The function includes a persistent variable associated with an internal state of the electronic circuit. The function is configured to initialize the persistent variable based on at least one call path to the function in the program.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.