Method to improve transistor Tox using high-angle implants with no additional masks
US7727838B2 · kind B2 · utility
4Cited by
19References
33Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 27, 2007 |
| Grant date | Jun 1, 2010 |
| Priority date | — |
| Expiry date | Jul 27, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/601
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming an integrated circuit includes forming a gate structure over a semiconductor body, and forming a shadowing structure over the semiconductor body laterally spaced from the gate structure, thereby defining an active area in the semiconductor body therebetween. The method further includes performing an angled implant into the gate structure, wherein the shadowing structure substantially blocks dopant from the angled implant from implanting into the active area, and performing a source/drain implant into the gate structure and the active area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.