Semiconductor device and a method of manufacturing the same
US7728442B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 9, 2007 |
| Grant date | Jun 1, 2010 |
| Priority date | — |
| Expiry date | Dec 9, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19043
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device manufacturing technique which allows reduction of semiconductor chip size. First, a pad and other wires are formed over an insulating film. A surface protective film is formed over the insulating film including the pad and wires, and an opening is made in the surface protective film. The opening lies over the pad and exposes a surface of the pad. A bump electrode is formed over the surface protective film including the opening. Here, the pad is smaller than the bump electrode. Consequently, the wires are arranged just beneath the bump electrode in the same layer as the pad 10. In other words, the wires are arranged in space which becomes available because the pad is small enough.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.