Current limiting load switch with dynamically generated tracking reference voltage
US7728655B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 10, 2008 |
| Grant date | Jun 1, 2010 |
| Priority date | — |
| Expiry date | Oct 10, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/0822
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A current limiting load switch for bridging supply Vss and load with a reference voltage VRdt dynamically generated by a VRdt-generator is proposed. It includes: A pair of power FET and sense FET interconnected in split-current configuration. The FET pair develops a load voltage while limiting load current Iload to a preset maximum Imax. The FET pair is sized to draw device currents Ipower and Is with RATIOI=Is/Ipower<<1. The sense FET high-side terminal is coupled to Vss through a sense resistor Rsense developing a sense voltage Vs=Is×Rsense. A current limiting amplifier with inputs connected to VRdt and Vs and output controlling FET pair closing a current limiting feedback loop. The VRdt-generator dynamically adjusts VRdt concurrent and compensatory with an undesirable effect of changing RATIOI caused by the sense FET operational transition thus eliminating a transitional overshoot of Iload beyond Imax.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.