Coherent shader output for multiple targets
US7728841B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 1, 2006 |
| Grant date | Jun 1, 2010 |
| Priority date | — |
| Expiry date | May 24, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2360/122
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In a multiple render target mode, a pixel shader computes color values for pixels and stores the computed color values in a register file. The register file acts as a buffer for the computed color values. Conventionally writing pixels in the order they are received (pixel-major order) can result in large strides across memory in the frame buffer. At least a minimum amount of work should be done within a DRAM page, for example, to cover the overhead required in opening the DRAM page. Therefore, color values are written from the register file to two or more targets in a frame buffer in a target-major order within a segment. Writing in a target-major order (sequential with respect to targets but non-sequential with respect to quads received and processed) yields coherent writes to frame buffer memory and improves memory efficiency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.