Resistance change memory device
US7729158B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 11, 2007 |
| Grant date | Jun 1, 2010 |
| Priority date | — |
| Expiry date | Dec 24, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8836
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A resistance change memory device including: a semiconductor substrate; cell arrays stacked above the substrate, each having memory cells, bit lines and word lines; a read/write circuit formed on the semiconductor substrate; first and second vertical wirings disposed to connect the bit lines to the read/write circuit; and third vertical wirings disposed the word lines to the read/write circuit. The memory cell includes a variable resistance element for storing as information a resistance value, which has a recording layer composed of a composite compound containing at least two types of cation elements, at least one type of the cation element being a transition element having “d” orbit, in which electrons are incompletely filled, the shortest distance between adjacent cation elements being 0.32 nm or less.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.