Efficient generation of SIMD code in presence of multi-threading and other false sharing conditions and in machines having memory protection support
US7730463B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 21, 2006 |
| Grant date | Jun 1, 2010 |
| Priority date | — |
| Expiry date | Apr 3, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3888
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer implemented method, system and computer program product for automatically generating SIMD code. The method begins by analyzing data to be accessed by a targeted loop including at least one statement, where each statement has at least one memory reference, to determine if memory accesses are safe. If memory accesses are safe, the targeted loop is simdized. If not safe, it is determined if a scheme can be applied in which safety need not be guaranteed. If such a scheme can be applied, the targeted loop is simdized according to the scheme. If such a scheme cannot be applied, it is determined if padding is appropriate. If padding is appropriate, the data is padded and the targeted loop is simdized. If padding is not appropriate, non-simdized code is generated based on the targeted loop for handling boundary conditions, the targeted loop is simdized and combined with the non-simdized code.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.