Metal salicide formation having nitride liner to reduce silicide stringer and encroachment
US7732298B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 31, 2007 |
| Grant date | Jun 8, 2010 |
| Priority date | — |
| Expiry date | Jan 31, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76829
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed herein are various embodiments of techniques for preventing silicide stringer or encroachment formation during metal salicide formation in semiconductor devices. The disclosed technique involves depositing a protective layer, such as a nitride or other dielectric layer, over areas of the semiconductor device where metal silicide formation is not desired because such formation detrimentally affects device performance. For example, silicon particles that may remain in device features that are formed through silicon oxidation, such as under the gate sidewall spacers and proximate to the perimeter of shallow trench isolation structures, are protected from reacting with metal deposited to form metal silicide in certain areas of the device. As a result, silicide stringers or encroachment in undesired areas is reduced or eliminated by the protective layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.