Method for using a modified post-etch clean rinsing agent
US7732345B2 · kind B2 · utility
0Cited by
3References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2006 |
| Grant date | Jun 8, 2010 |
| Priority date | — |
| Expiry date | Mar 31, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02063
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides a method for manufacturing an integrated circuit. In one embodiment, the method includes etching one or more openings within a substrate using an etch tool, and subjecting the one or more openings to a post-etch clean, wherein a delay time exists between removing the substrate from the etch tool and the subjecting the one or more opening to the post-etch clean. This method may further include exposing the substrate having been subjected to the post-etch clean to a rinsing agent, wherein a resistivity of the rinsing agent is selected based upon the delay time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.