Inventor · Plano, TX, US

Trace Hurd

17Patents
4h-index
25Co-inventors
60Inventor score

Filing activity: Aug 8, 2001 → Nov 23, 2022

Most-cited inventions

PatentTitleAreaCited byStatus
US6787425B1 Methods for fabricating transistor gate structures Electricity 20 Expired
US6709875B2 Contamination control for embedded ferroelectric device fabrication processes Electricity 11 Expired
US7528072B2 Crystallographic preferential etch to define a recessed-region for epitaxial growth Electricity 5 Expired
US8049254B2 Semiconductor device with gate-undercutting recessed region Electricity 4 Active
US7195679B2 Versatile system for wafer edge remediation Emerging Cross-Sectional Technologies 2 Expired
US7323403B2 Multi-step process for patterning a metal gate electrode Electricity 2 Expired
US7371691B2 Silicon recess improvement through improved post implant resist removal and cleans Electricity 2 Expired
US7132365B2 Treatment of silicon prior to nickel silicide formation Electricity 1 Expired
US6995088B2 Surface treatment of copper to improve interconnect formation Electricity 1 Expired
US10886290B2 Etching of silicon nitride and silica deposition control in 3D NAND structures Electricity 0 Active
US7037823B2 Method to reduce silanol and improve barrier properties in low k dielectric ic interconnects Electricity 0 Expired
US12002687B2 System and methods for wafer drying Electricity 0 Active
US10844332B2 Aqueous cleaning solution and method of protecting features on a substrate during etch residue removal Chemistry; Metallurgy 0 Active
US7422969B2 Multi-step process for patterning a metal gate electrode Electricity 0 Active
US11376640B2 Apparatus and method to electrostatically remove foreign matter from substrate surfaces Electricity 0 Active
US11515178B2 System and methods for wafer drying Electricity 0 Active
US7732345B2 Method for using a modified post-etch clean rinsing agent Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.