Automated circuit design dimension change responsive to low contrast condition determination in photomask phase pattern
US7735056B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 30, 2006 |
| Grant date | Jun 8, 2010 |
| Priority date | — |
| Expiry date | May 21, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F1/26
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The present application is directed to methods of forming a phase pattern for an integrated circuit feature described in a design database as having a first target dimension. In one embodiment, the method comprises determining whether forming a phase pattern for the integrated circuit feature described in the design database will result in one or more phase blocks of the same phase type being positioned in relative proximity so as to result in a low contrast condition, selecting a second target dimension that will avoid the low contrast condition if the low contrast condition will result, and forming the phase pattern for an integrated circuit feature having the second target dimension. Systems for forming phase patterns and photomasks comprising the phase patterns of the present application are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.