Process for the collective fabrication of microstructures consisting of superposed elements
US7737000B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Dec 8, 2005 |
| Grant date | Jun 15, 2010 |
| Priority date | — |
| Expiry date | Jan 21, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/1461
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
The invention relates to the collective fabrication of superposed microstructures, such as an integrated circuit and a protective cover. Individual structures each comprising superposed first and second elements are fabricated collectively. The first elements (for example, integrated circuit chips) are prepared on a first plate and the second elements (for example, transparent covers) are prepared on a second plate. The plates are bonded to each other over the major portion of their facing surfaces, but with no bonding of the defined zones in which there is no adhesion. The individual structures are then diced via the top on the one hand and via the bottom on the other hand along different parallel dicing lines passing through the zones with no adhesion, so that, after dicing, the first elements retain surface portions (those lying between the parallel dicing lines) that are not covered by a second element. A connection pad may thus remain accessible at this point.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.