Formation of fully silicided gate with oxide barrier on the source/drain silicide regions
US7737015B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 27, 2007 |
| Grant date | Jun 15, 2010 |
| Priority date | — |
| Expiry date | Jul 17, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/32105
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A simple and cost effective method of forming a fully silicided (FUSI) gate of a MOS transistor is disclosed. In one example, the method comprises forming a nitride hardmask overlying a polysilicon gate, forming an S/D silicide in source/drain regions of the transistor, oxidizing a portion of the S/D silicide to form an oxide barrier overlying the S/D silicide in the source/drain regions, removing the nitride hardmask from the polysilicon gate, and forming a gate silicide such as by deposition of a gate silicide metal over the polysilicon gate and the oxide barrier in the source/drain regions to form a fully silicided (FUSI) gate in the transistor. Thus, the oxide barrier protects the source/drain regions from additional silicide formation by the gate silicide metal formed thereafter. The method may further comprise selectively removing the oxide barrier in the source/drain regions after forming the fully silicided (FUSI) gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.