Method of fabricating CMOS devices using fluid-based dielectric materials
US7737020B1 · kind B1 · utility
5Cited by
4References
10Claims
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Key dates
| Filing date | Dec 21, 2005 |
| Grant date | Jun 15, 2010 |
| Priority date | — |
| Expiry date | Sep 18, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Fluid-based dielectric material is used to backfill multiple patterned metal layers of an IC on a wafer. The patterned metal layers are fabricated using conventional CMOS techniques, and are IMD layers in particular embodiments. The dielectric material(s) are etched out of the IC to form a metal network, and fluid dielectric material precursor, such as a polyarylene ether-based resin, is applied to the wafer to backfill the metal network with low-k fluid-based dielectric material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.