Patent · US Active

Method of fabricating a nitrided silicon oxide gate dielectric layer

US7737050B2 · kind B2 · utility

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4References
45Claims
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Key dates

Filing dateOct 30, 2006
Grant dateJun 15, 2010
Priority date
Expiry dateJun 13, 2028

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L21/02238
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method of forming a nitrided silicon oxide layer. The method includes: forming a silicon dioxide layer on a surface of a silicon substrate; performing a rapid thermal nitridation of the silicon dioxide layer at a temperature of less than or equal to about 900° C. and a pressure greater than about 500 Torr to form an initial nitrided silicon oxide layer; and performing a rapid thermal oxidation or anneal of the initial nitrided silicon oxide layer at a temperature of less than or equal to about 900° C. and a pressure greater than about 500 Torr to form a nitrided silicon oxide layer. Also a method of forming a MOSFET with a nitrided silicon oxide dielectric layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.