FinFET SRAM with asymmetric gate and method of manufacture thereof

US7737501B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Huilong Zhu · Poughkeepsie, US
• Haining Yang · Wappingers Falls, US

Key dates

• Filing date: Jul 11, 2007
• Grant date: Jun 15, 2010
• Expiry date: Oct 2, 2027

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/62

Abstract

A FinFET SRAM transistor device includes transistors formed on fins with each transistor including a semiconductor channel region within a fin plus a source region and a drain region extending within the fin from opposite sides of the channel region with fin sidewalls having a gate dielectric formed thereon. Bilateral transistor gates extend from the gate dielectric. An asymmetrically doped FinFET transistor has source/drain regions doped with a first dopant type, but the asymmetrically doped FinFET transistor include at least one of the bilateral transistor gate electrode regions on one side of at least one of the fins counterdoped with respect to the first dopant type. The finFET transistors are connected in a six transistor SRAM circuit including two PFET pull-up transistors, two NFET pull down transistors and two NFET passgate transistors.