Integrated circuit devices having uniform silicide junctions
US7737512B2 · kind B2 · utility
1Cited by
3References
38Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 11, 2007 |
| Grant date | Jun 15, 2010 |
| Priority date | — |
| Expiry date | Oct 15, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/015
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Integrated circuit devices are provided including an integrated circuit substrate and a gate on the integrated circuit substrate. The gate has sidewalls. A barrier layer spacer is provided on the sidewalls of the gate. A portion of the barrier layer spacer protrudes from the sidewalls of the gate exposing a lower surface of the barrier layer spacer that faces the integrated circuit substrate. A silicide layer is provided on the portion of the barrier layer spacer protruding from the sidewalls of the gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.