Hybrid Schottky source-drain CMOS for high mobility and low barrier
US7737532B2 · kind B2 · utility
10Cited by
9References
20Claims
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Key dates
| Filing date | Sep 6, 2005 |
| Grant date | Jun 15, 2010 |
| Priority date | — |
| Expiry date | Jun 22, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/62
Abstract
A CMOS device is provided. A semiconductor device comprises a substrate, the substrate having a first region and a second region, the first region having a first crystal orientation represented by a family of Miller indices comprising {i,j,k}, the second region having a second crystal orientation represented a family of Miller indices comprising {l,m,n}, wherein l2+m2+n2>i2+j2+k2. Alternative embodiments further comprise an NMOSFET formed on the first region, and a PMOSFET formed on the second region. Embodiments further comprise a Schottky contact formed with at least one of a the NMOSFET or PMOSFET.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.