Patent · US Active

Integrated circuit with a programmable delay and a method thereof

US7737740B2 · kind B2 · utility

21Cited by
3References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 26, 2007
Grant dateJun 15, 2010
Priority date
Expiry dateSep 17, 2027

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K2005/0013
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

An integrated circuit including a first circuit block having a power supply terminal for receiving a first power supply voltage and an output terminal for providing a first data signal is provided. The integrated circuit further includes a second circuit block having a power supply voltage terminal for receiving a second power supply voltage and an input terminal coupled to the output terminal of the first circuit block for receiving the first data signal. The integrated circuit further includes a first programmable delay block for adding a first delay time to the first data signal when one or both of the first or second power supply voltages is changed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.