Scheme for improving settling behavior of gain boosted fully differential operational amplifier
US7737780B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 12, 2007 |
| Grant date | Jun 15, 2010 |
| Priority date | — |
| Expiry date | Sep 12, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45356
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present invention disclose operational amplifiers which demonstrate good settling behavior with minimum over-shoot or ringing for improving settling behavior. The amplifiers include one or more amplification stages connected to form a symmetric structure. The amplification stage includes a boosting amplifier, a MOS transistor and a compensation capacitor. The MOS transistor can be an NMOS transistor and a PMOS transistor. Using this scheme pole-zero doublets are rearranged in a manner to improve the transient settling response.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.