Content-addressable memory architecture
US7738274B1 · kind B1 · utility
26Cited by
42References
28Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 27, 2008 |
| Grant date | Jun 15, 2010 |
| Priority date | — |
| Expiry date | Sep 18, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/39
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A content-addressable memory (“CAM”) architecture and method for reducing power consumption thereof are described. A CAM cell array includes CAM cells, each of which includes two thyristor-based storage elements. Each thyristor-based storage element of the CAM cells has a control gate, an anode, and a cathode for providing control gates, anodes, and cathodes of the CAM cells. The CAM cell array further includes matchlines directly coupled to the cathodes of the CAM cells; searchlines directly coupled to the anodes of the CAM cell; and gatelines coupled to the control gates of the CAM cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.