Emulation system with time-multiplexed interconnect
US7739097B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 22, 2002 |
| Grant date | Jun 15, 2010 |
| Priority date | — |
| Expiry date | Oct 23, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S370/916
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A hardware emulation system is disclosed which reduces hardware cost by time multiplexing multiple design signals onto physical logic chip pins and printed circuit board. The hardware emulation system comprises a plurality of reprogrammable logic devices, and a plurality of reprogrammable interconnect devices. The logic devices and interconnect devices are interconnected together such that multiple design signals share common I/O pins and circuit board traces through the use of multiplexing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.