Descriptor transfer logic
US7739426B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2006 |
| Grant date | Jun 15, 2010 |
| Priority date | — |
| Expiry date | Dec 25, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L12/66
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A processing engine includes descriptor transfer logic that receives descriptors generated by a software controlled general purpose processing element. The descriptor transfer logic manages transactions that send the descriptors to resources for execution and receive responses back from the resources in response to the sent descriptors. The descriptor transfer logic can manage the allocation and operation of buffers and registers that initiate the transaction, track the status of the transaction, and receive the responses back from the resources all on behalf of the general purpose processing element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.