Receiver circuitry for receiving reduced swing signals from a channel
US7741873B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 21, 2008 |
| Grant date | Jun 22, 2010 |
| Priority date | — |
| Expiry date | Apr 21, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018585
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A receiver for receiving a reduced swing signal from a transmission channel is disclosed, in which the swing of the reduced swing signal is less than the power supply of the receiver and possibly is less than the power supply of the transmitter. The receiver comprises a level shifter for offsetting the reduced swing signal, and an amplifier which receives both the reduced swing signal and its offset to produce a full swing signal output referenced to the power supply of the receiver. The full swing signal can thereafter be buffered, and eventually can be captured by a clock. Optionally, the disclosed reduced swing receiver also contains calibration circuitry for improving the integrity of the full swing signal output, and in particular for countering the effects of process, and in some embodiments temperature, variations, which alter the characteristics of the transistors which make up the receiver circuitry. More particularly, the calibration circuitry compensates for the unbalanced way in which process and temperature variations impact transistors of differing polarities (e.g., n-type and p-type).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.