Noise-reduction metrology models
US7742177B2 · kind B2 · utility
4Cited by
1References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 22, 2008 |
| Grant date | Jun 22, 2010 |
| Priority date | — |
| Expiry date | Nov 1, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01N21/956
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The invention can provide apparatus and methods for processing wafers using Noise-Reduction (N-R) metrology models that can be used in Double-Patterning (D-P) processing sequences, Double-Exposure (D-E) processing sequences, or other processing sequences.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.